Conventional switch system on chip (switch SOC) generally includes serializer/deserializer (SerDes) circuits to convert serial data to parallel data or to convert parallel data to serial data. In order to satisfy next generation switch SOC, the SerDes circuits need to support multi-standards to meet the system requirement, however, designing multi-standards SerDes circuits within the switch SOC may cause some problems. First, the power dissipation cannot be optimized for every SerDes circuit, and the SerDes circuits may take a lot of overhead to support different standards such as non-return-to-zero (NRZ) standard and pulse-amplitude modulation (PAM) standard at the same circuits. Second, the switch SOC is manufactured by advanced Complementary Metal-Oxide-Semiconductor (CMOS) process that is the best choice for the core circuit, but this advanced CMOS process may not be the best for the high-speed SerDes circuits. In addition, the core circuit of the switch SOC may be manufactured by a low supply voltage process, for example 10 nm process with 0.75V supply voltage, however, some SerDes circuits should be operated in wide dynamic range so that the low supply voltage process is not a good solution.